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Generate a N bits shifter with name modelname.
How it works :
if the op[0] signal is set to '1' performs a right shift, performs a left shift otherwise.
if the op[1] signal is set to '1' performs an arithmetic shift (only meaningful in case of a right shift).
shamt : specifies the shift amount. The width of this signal (Y) is computed from the operator's width : Y = ceil(log2(N)) - 1.
GENLIB_MACRO(DPGEN_SHIFT, "model_shift_32",
F_BEHAV|F_PLACE,
32);
GENLIB_LOINS("model_shift_32",
"instance1_shift_32",
"op[1:0]",
"shamt[4:0]",
"x[31:0]",
"y[31:0]",
"vdd", "vss", NULL);
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